• Thursday | October 30, 2025 | 8:00 - 16:30

    Top Picks Workshop creates a venue to showcase the best and high impact recently published works in the area of hardware and embedded security. These works will be selected from conference papers that have appeared in leading hardware security conferences including but not limited to DAC, ICCAD, DATE, ASPDAC, HOST, Asian HOST, GLSVLSI, VLSI Design, CHES, ETS, VTS, ITC, S&P, Usenix Security, CCS, NDSS, ISCA, MICRO, ASPLOS, HPCA, HASP, ACSAC, Euro S&P, and Asia CCS. The 8th Top Picks workshop will be collocated with ICCAD 2025. The authors of a short list of papers picked from the submissions are required to present their work at the workshop on October 30, 2025 and are invited to attend ICCAD’s networking in–person on October 30, 2025. The presentation including a discussion (Q&A) session, is mandatory.

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      Ahmad-Reza Sadeghi

      Technical University of Darmstadt Darmstadt, Hesse, Germany

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      Xiaolin Xu

      Northeastern University, USA

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      Lichao Wu

      Technical University of Darmstadt, Germany

  • Thursday | October 30, 2025 | 8:00 - 16:30

    The rapid transition toward Post-Quantum Cryptography (PQC) has prompted a global effort to redefine digital security in anticipation of quantum-capable adversaries. While PQC algorithms are mathematically robust, their secure and efficient integration into hardware systems introduces new vulnerabilities and engineering challenges—especially in areas such as side-channel resistance, hardware/software co-design, and formal verification. The Workshop on Post-Quantum Cryptography and Secure Hardware (WPQC) aims to address these challenges by serving as a dedicated forum for researchers and practitioners in hardware security, EDA/CAD, computer architecture, and cryptography. 

    The workshop provides a platform to explore the intersection of PQC and hardware/system design, highlighting recent advancements in secure accelerator development, design automation, system integration, and emerging threat models. By bringing together experts from academia, industry, and standardization bodies, WPQC seeks to accelerate collaborative research efforts and foster a shared vision for building resilient, verifiable, and efficient post-quantum systems.


     

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      Reza Azarderakhsh

      FL Atlantic U, and PQSecure (USA)

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      Mojtaba Bisheh-niasar

      Microsoft (USA)

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      Michael Hutter

      University of the Bundeswehr Munich and PQShield, Germany

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      Debdeep Mukhopadhyay

      Indian Institute of Technology Kharagpur (IIT KGP), India

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      Praveen Vadnala

      PQShield, Germany

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      Shivam Bhasin

      NTU (Singapore)

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      Trevor E. Carlson

      NUS (Singapore)

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      Mona Hashemi

      NUS (Singapore)

  • Thursday | October 30, 2025 | 8:00 - 16:30

    Our proposed workshop aims to address emerging challenges and explore innovative solutions in the field of quantum technologies, particularly focusing on quantum computing applications for real-world problems. Quantum technologies are becoming crucial in a variety of scientific domains including chemistry, finance, power systems, etc. Our workshop will bring together researchers, practitioners, and industry experts to exchange ideas, share applications, and discuss the latest advancements in quantum algorithms, error correction, control techniques, and their applications across diverse fields. This event will serve as a platform to showcase cutting-edge research, foster collaboration, and drive innovation in the intersection of CAD, optimization, machine learning, and quantum computing.


     

  • Thursday | October 30, 2025 | 8:00 - 16:30

    SLIP, co-located with ICCAD, brings together researchers and practitioners who have a shared interest in the challenges and futures of system-level interconnect, coming from wide-ranging backgrounds that span system, application, design and technology.  

    The technical goal of the workshop is to

    • identify fundamental problems, and,
    • foster new pathfinding of design, analysis, and optimization of system-level interconnects with emphasis on system-level interconnect modeling and pathfinding, DTCO-enhanced interconnect fabrics, memory and processor communication links, novel dataflow mapping for machine learning, 2.5/3D architectures, and new fabrics for the beyond-Moore era.  

    Original submissions in the form of regular technical papers, invited sessions (tutorials, panels, special-topic sessions), workshop discussion topics, and posters are welcome. Program content is accepted based on novelty and contributions to the advancement of the field. Authors will keep the copyright of their work and there will be no published proceedings.

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      Dirk Stroobandt

      Univ of Gent, Belgium

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      Mustafa Badaroglu

      Qualcomm, USA

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      Seungwon Kim

      Cadence, USA

  • Thursday | October 30, 2025 | 8:00 - 11:30

    The rapid advancement of foundation models has brought powerful new capabilities to Electronic Design Automation (EDA). Unlike traditional task-specific Artificial Intelligence (AI) approaches, foundation models leverage self-supervised learning and large-scale data pre-training to acquire strong generalization abilities. These models can then be efficiently fine-tuned on EDA-specific datasets, enabling a wide range of downstream applications such as hardware code generation, debug and optimization, EDA agents, circuit representation learning and understanding, etc.

    This workshop aims to foster collaboration among researchers, engineers, and industry experts to explore the evolving intersection of foundation models and EDA methodologies. By identifying key challenges and exchanging ideas, we seek to inspire comparative analysis between the unique demands of EDA and those of other application domains, and to promote novel solutions that leverage the strengths of foundation models for more accurate, efficient, and scalable design automation. Through talks, paper presentations, and interactive discussions, the workshop will showcase recent progress and explore new ways to apply foundation models in EDA—helping to drive innovation and advance the future of intelligent circuit design.

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      Program Chair

      University of Illinois

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      Igor Markov

      Synopsys

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      Guohao Dai

      Shanghai Jiao Tong University

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      Siddharth Garg

      NY University

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      Zhengyuan Shi

      Chinese University of Hong Kong

  • Thursday | October 30, 2025 | 13:00 - 16:30

    Chiplet-based platform is a pragmatic solution to meet the automotive industry's growing demands for performance, longevity, and cost-efficiency. Such platforms enable modular, scalable integration of diverse processing units (like CPUs, GPUs, and AI accelerators) across different process nodes, improving design flexibility, yield, and reliability, which is critical in safety-driven environments. They also support thermal and power optimization, simplify long-term maintenance and supply chain challenges, and align well with emerging zonal E/E architectures. The purpose of the workshop is to outline the challenges and novel solutions to enable chiplet-based computing platform for automotive domain.

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      imec

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      Karlsruhe Institute of Technology (KIT)

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      Cadence Design Systems

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      University of Michigan in Ann Arbor

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      EMEA